 `include "top_define.v"
module multi_cam_top
               ( 
                clk,
                rst_n,
                ram_dp_cfg_register,
      // connectwith cpu_interface
                //cpu\u5199
                wr_en_cpu,
                multi_modify_cpu,
                multi_group_mac_cpu,
                multi_member_cpu,
                //cpu \u8bfb
                cpu_rd_multicam_cpu_vld,
        cpu_rd_multicam_rden,
                cpu_rd_multicam_address_cpu,
                cpu_rd_multicam_cpu,
                
      //connect with shcedule
                
        multi_mac_addr_en,
        multi_mac_in,
        multi_group,
        multi_outport_en,
        multi_busy,

                init_end
                );
input clk;
input rst_n;
input [11:0]ram_dp_cfg_register;
// connect with cpu_interface

input wr_en_cpu;
input [31:0]multi_modify_cpu;
input [31:0]multi_group_mac_cpu;
input [31:0]multi_member_cpu;

input        cpu_rd_multicam_rden      ;
input [11:0] cpu_rd_multicam_address_cpu;
output [31:0]cpu_rd_multicam_cpu;
output cpu_rd_multicam_cpu_vld;
//connect with shcedule

input multi_mac_addr_en;
input [23:0] multi_mac_in;
output [7:0]multi_group;
output multi_outport_en;
output multi_busy;
output init_end;


wire   multi_hash_en;
wire   multi_hash_en_r;
wire   multi_hash_en_l;
wire   [9:0]multi_hash_mac;
wire   [9:0]multi_hash_mac_r;
wire   [9:0]multi_hash_mac_l;
wire   [23:0]multi_mac;
wire   [23:0]multi_mac_l;
wire   [23:0]multi_mac_r;
wire   multi_mac_hash_en;
wire   multi_mac_hash_en_r;
wire   multi_mac_hash_en_l;
wire   hash_busy;
wire   hash_busy_r;
wire   hash_busy_l;


wire   rd_busy;
wire   wr_busy;
wire   [23:0]rd_mac;
// wire   [23:0]wr_mac;

wire    wren_a;
wire    wren_b;
wire    [9:0]addr_a;
wire    [9:0]addr_b;
wire    [71:0]data_a;
wire    [71:0]q_a;
wire    [71:0]q_b;


wire    renew_busy;
wire    lookup_busy;
wire    ini_multitable_busy;



assign   multi_busy = renew_busy|lookup_busy|ini_multitable_busy;

assign   init_end   = ~ini_multitable_busy;

renew  renew_inst(
                      .clk(clk),
                      .rst_n(rst_n),
 ///  connect with cpu                     
                      .wr_en_cpu(wr_en_cpu),
                      .multi_modify_cpu(multi_modify_cpu),
                      .multi_group_mac_cpu(multi_group_mac_cpu),
                      .multi_member_cpu(multi_member_cpu),
                       
                       .cpu_rd_multicam_rden        (cpu_rd_multicam_rden       ),
                       .cpu_rd_multicam_address_cpu (cpu_rd_multicam_address_cpu),
                       .cpu_rd_multicam_cpu         (cpu_rd_multicam_cpu        ),       
                       .cpu_rd_multicam_cpu_vld(cpu_rd_multicam_cpu_vld)        ,
 //   connect with multi_hash
                      .multi_hash_en(multi_hash_en_r),
                      .multi_hash_mac(multi_hash_mac_r),
                      .multi_mac(multi_mac_r),
                      .multi_mac_hash_en(multi_mac_hash_en_r),
                      .hash_busy(hash_busy_r),
//    connect with lookup
                      .rd_mac(rd_mac),
                      .lookup_busy(lookup_busy),
                      .renew_busy(renew_busy),
//    connect wiht multi_addr_table
                      .wren_a(wren_a),
                      .rd_addr_a(addr_a),
                      .data_a(data_a),
                      .q_a(q_a),
                      .ini_multitable_busy(ini_multitable_busy)

                   );

lookup lookup_inst( 
            .clk(clk),
                      .rst_n(rst_n),

////   connect with  schedule
                      .multi_mac_addr_en(multi_mac_addr_en),
                      .multi_mac_in(multi_mac_in),
                      .multi_outport_en(multi_outport_en),
                      .multi_group(multi_group),
 //   connect with multi_hash
                      .multi_hash_en(multi_hash_en_l),
                      .multi_hash_mac(multi_hash_mac_l),
                      .multi_mac(multi_mac_l),
                      .multi_mac_hash_en(multi_mac_hash_en_l),
                      .hash_busy(hash_busy_l),
    //    connect with renew
                      .rd_mac(rd_mac),
                      .lookup_busy(lookup_busy),
                      .ini_multitable_busy(ini_multitable_busy),
                      
//    connect wiht multi_addr_table
                      .wren_b(wren_b),
                      .addr_b(addr_b),
                      .q_b(q_b)


                     );
                     
`ifdef ASIC
ram_dp_d1024_w72_wrapper multi_addr_table_asic(
    .clka(clk),
    .clkb(clk),
    .ram_dp_cfg_register(ram_dp_cfg_register),
    .wea(wren_a),
    .web(wren_b),
    .addra(addr_a),
    .addrb(addr_b),
    .dina(data_a),
    .dinb(72'b0),
    .douta(q_a),
    .doutb(q_b)
);
`else                     
TDP_RAM_W72_D1024 multi_addr_table_inst(
            .addra(addr_a),
            .addrb(addr_b),
            .clka(clk),
            .clkb(clk),
            .dina(data_a),
            .dinb(72'b0),
            .wea(wren_a),
            .web(wren_b),
            .douta(q_a),
            .doutb(q_b)
            );
`endif             



multi_hash  multi_hash_r_inst(
        .clk(clk),
        .rst_n(rst_n),
        .multi_mac(multi_mac_r),
        .multi_mac_hash_en(multi_mac_hash_en_r),
        .multi_hash_en(multi_hash_en_r),
                .multi_hash_mac(multi_hash_mac_r) ,
        .hash_busy(hash_busy_r)
                       );

multi_hash  multi_hash_l_inst(
        .clk(clk),
        .rst_n(rst_n),
        .multi_mac(multi_mac_l),
        .multi_mac_hash_en(multi_mac_hash_en_l),
        .multi_hash_en(multi_hash_en_l),
                .multi_hash_mac(multi_hash_mac_l) ,
        .hash_busy(hash_busy_l)
                       );

endmodule

